From: TJ Date: Sat, 30 Oct 2010 17:46:51 +0000 (+0100) Subject: Build arch-init-7x30.S instead of msm7x30-init.S and remove the latter. X-Git-Url: https://iam.tj/gitweb/gitweb.cgi?p=bootloader-ap.git;a=commitdiff_plain;h=4409152139dd4c3ca48694b73dd673c3121ed0b5 Build arch-init-7x30.S instead of msm7x30-init.S and remove the latter. --- diff --git a/arch/Makefile b/arch/Makefile index 4fdd901..7751596 100644 --- a/arch/Makefile +++ b/arch/Makefile @@ -1,5 +1,5 @@ obj-$(CONFIG_ARCH_ARM) += arm-head.o -obj-$(CONFIG_ARCH_MSM7X30) += msm7x30-init.o +obj-$(CONFIG_ARCH_MSM7X30) += arch-init-7x30.o arch.o: $(obj-y) $(LD) -N -Ttext 0x8D000000 -e _start -o arch.o $(obj-y) diff --git a/arch/msm7x30-init.S b/arch/msm7x30-init.S deleted file mode 100644 index 500f100..0000000 --- a/arch/msm7x30-init.S +++ /dev/null @@ -1,110 +0,0 @@ -/* - Initialise the Qualcomm MSM7x30 Processor - Copyright (c) 2010 TJ - - This program is free software: you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation, either version 3 of the License, or - (at your option) any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program (See the COPYRIGHT file the base directory). - If not, see . -*/ - -#include - -/* - SOURCE: HTC Vision Linux kernel 2.6.32 source - SOURCE_FILE: arch/arm/mach-msm/arch-init-7x30.S - SOURCE_URL: http://dl3.htc.com/RomCode/Source_and_Binaries/vision-2.6.32-g814e0a1.tar.gz - SOURCE_FOR: MSM7x30 equates, status-codes, IOMEM addresses, CP15 functions -*/ - -#define DSB .byte 0x4f, 0xf0, 0x7f, 0xf5 -#define ISB .byte 0x6f, 0xf0, 0x7f, 0xf5 - -/* - ; LVT Ring Osc counter - ; used to determine sense amp settings - ; Clobbers registers r0, r4, r5, r6, r7, r9, r10, r11 -*/ -.equ CLK_CTL_BASE, 0xA8600000 -.equ A_GLBL_CLK_ENA, 0x0000 -.equ A_PRPH_WEB_NS_REG,0x0080 -.equ A_MSM_CLK_RINGOSC,0x00D0 -.equ A_TCXO_CNT, 0x00D4 -.equ A_TCXO_CNT_DONE, 0x00D8 -.equ A_RINGOSC_CNT, 0x00DC -.equ A_MISC_CLK_CTL, 0x0108 -.equ CLK_TEST, 0xA8600114 -.equ SPSS_CSR_BASE, 0xAC100000 -.equ A_SCRINGOSC, 0x0510 - -//;; Number of TCXO cycles to count ring oscillations -.equ TCXO_CNT_VAL, 0x100 - -//; Halcyon addresses -.equ TCSR_CONF_FUSE_1, 0xAB600060 //; TCSR_CONF_FUSE_1 register -.equ TCSR_CONF_FUSE_4, 0xAB60006C //; TCSR_CONF_FUSE_4 register - -//; SCORPION_L1_ACC (1:0) Fuses bit location -.equ L1_ACC_BIT_0, 12 //;12th bit of TCSR_CONF_FUSE_4 -.equ L1_ACC_BIT_1, 13 //;13th bit of TCSR_CONF_FUSE_4 -//; SCORPION_L2_ACC (2:0) Fuses bit location -.equ L2_ACC_BIT_0, 25 //;25th bit of TCSR_CONF_FUSE_1 -.equ L2_ACC_BIT_1, 10 //;10th bit of TCSR_CONF_FUSE_4 -.equ L2_ACC_BIT_2, 11 //;11th bit of TCSR_CONF_FUSE_4 - -//; CP15: PVR2F0 values according to SCORPION_L1_ACC (1:0) -.equ PVR2F0_00, 0x00000000 -.equ PVR2F0_01, 0x04000000 -.equ PVR2F0_10, 0x08000000 -.equ PVR2F0_11, 0x0C000000 - -//; CP15: PVR2F1 values according to SCORPION_L1_ACC (1:0) -.equ PVR2F1_00, 0x00000008 -.equ PVR2F1_01, 0x00000008 -.equ PVR2F1_10, 0x00000208 -.equ PVR2F1_11, 0x00000208 - -//; CP15: PVR0F2 values according to SCORPION_L1_ACC (1:0) -.equ PVR0F2_00, 0x00000000 -.equ PVR0F2_01, 0x00000000 -.equ PVR0F2_10, 0x00000200 -.equ PVR0F2_11, 0x00000200 - -//; CP15: PVR0F0 values according to SCORPION_L1_ACC (1:0) -.equ PVR0F0_00, 0x7F000000 -.equ PVR0F0_01, 0x7F000400 -.equ PVR0F0_10, 0x7F000000 -.equ PVR0F0_11, 0x7F000400 - -//; CP15: L2VR3F1 values according to SCORPION_L2_ACC (2:0) -.equ L2VR3F1_000, 0x00FFFF60 -.equ L2VR3F1_001, 0x00FFFF40 -.equ L2VR3F1_010, 0x00FFFC60 -.equ L2VR3F1_011, 0x00FFFC40 -.equ L2VR3F1_100, 0x00FCFF60 -.equ L2VR3F1_101, 0x00FCFF40 -.equ L2VR3F1_110, 0x00FCFC60 -.equ L2VR3F1_111, 0x00FCFC40 - -/* SOURCE_END */ - - .section ".start", #alloc, #execinstr -ENTRY(__init_msm_7x30) - mov r4,#0 - ldr r1,=TCSR_CONF_FUSE_4 - mov r2,#0x0C - ldr r3,[r1] - bx lr - -.ltorg - -// EOF