/* Initialise the Applications Processor Copyright (c) 2010 TJ This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License version 2 as published by the Free Software Foundation. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. If not, see . */ #include #include #include #include .section ".text", #alloc, #execinstr ENTRY(_start) .type _start,#function b __cpu_early_init version: .align 2 .asciz VERSION .align 4 description: .align 2 .asciz DESCRIPTION .align 4 release: .align 2 .asciz RELEASE .align 4 arch: .align 2 .asciz IMG_NAME_ARCHITECTURE .align 4 build: .align 2 .asciz BUILD_STRING .align 4 ENTRY(__init) mrc p15,0,r0,c1,c0 @ read control register configuration data bic r0,r0,#0x0000B000 @ clear bit 10: Should Be Zero bic r0,r0,#0x00000005 @ bit 2: data cache disabled. bit 0: MMU disable orr r0,r0,#0x00000002 @ bit 1: strict alignment checks enabled mcr p15,0,r0,c1,c0 @ write control register configuration bl SET_SA @ sense amp settings bl __cpu_early_init msr cpsr_c, #(SVC_MODE | PSR_F_BIT | PSR_I_BIT) @ ensure svc mode and IRQs disabled ldr r0,=0x0050078 mcr p15,0,r0,c1,c0,0 //; WCP15_SCTLR r2 ISB @ macro for "isb sy" because compiler may not support opcode // EOF